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Radiation Effects in Semiconductors - Chapter 9
Real-Time Soft-Error Rate Characterization of Advanced SRAMs
Jean-Luc Autran, Daniela Munteanu, Sébastien Sauze, Philippe Roche, Gilles Gasiot
Friday 26 March 2010
by Jean-Luc Autran
popularity : 8%
This chapter briefly surveys different aspects of the ASTEP/LSM program, including the description of the two test platforms and their radiation environment, the real-time setups and a synthesis of more than one cumulative year of real-time characterization concerning two generations of SRAM circuits manufactured in 130 and 65 nm CMOS technologies.

This book chapter will be published in Radiation Effects in Semiconductors (ISBN: 9781439826942) Editor(s): Krzysztof Iniewski, CMOS Emerging Technologies Inc., Vancouver, British Columbia

See the CRC Press web page for this book :

 
This section's articles
  1. Altitude SEE Test European Platform (ASTEP): Project Overview, First Results in CMOS 130nm and Perspectives
    13 October 2008

  2. Altitude SEE Test European Platform (ASTEP) and First Results in CMOS 130 nm SRAM
    13 October 2008

  3. Real-time Soft-Error Rate Testing of Semiconductor Memories on the European Test Platform ASTEP (invited)
    13 October 2008

  4. Real-Time Neutron and Alpha Soft-Error Rate Testing of CMOS 130nm SRAM: Altitude versus Underground Measurements
    13 October 2008

  5. Altitude and Underground Real-Time SER Characterization of CMOS 65nm SRAM
    28 January 2009

  6. RADSOL 2009
    4 May 2009

  7. La plateforme ASTEP du Plateau de Bure (paper in French)
    25 March 2010

  8. Real-Time Soft-Error Rate Characterization of Advanced SRAMs
    26 March 2010

  9. Soft-errors induced by terrestrial neutrons and natural alpha-particle emitters in advanced memory circuits at ground level
    23 August 2010

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